The client is a communication system entity specializing in the development of end-to-end RF systems.
The client sought to develop a 20 Mbps high-speed QPSK diversity modem that operated at an IF of 70 MHz and Ethernet as the data interface. The modem requires two transmit channels and four receive channels. The receive channel signals are to be equalized, time aligned and combined before performing SRRC, baseband filtering, carrier synchronization, symbol recovery, de-scrambling, FEC decoding and bit conversion to Ethernet frames. The modulator is to have incorporated interleaving to minimize the ISI on the receiver end.
Challenges & Requirements:
1. The modem has to be delivered in a short time frame of 12 months.
2. The complete modem firmware consisted of a multitude of algorithms to be implemented on the FPGA's.
3. The assemblies consisted of mixed signal hardware that featured multitude of clocks and interleaved analog and digital portions
4. The Ethernet data interface was to act as a transparent bridge to the networks on the transmitting and receiving sides.
Thotakã designed the modem in two stages, the first stage consisting of a prototype stage that consisted on 15 different boards to validate the selection of components and sanity of the algorithms. Thotakã ported the existing QPSK satellite modem code to the new platform and went on to develop the diversity portions such as diversity combining, adaptive equalization, interleaving, de-interleaving etc. In the second stage the complete hardware was shrunk to six cards consisting of 3 different FPGA's one of which is a SoC-FPGA and the complete modem functionality was realized.
Benefits & Outcome:
1. Thotaka's hardware team effectively architected a stack-able multi-board solution both for the prototype and the final product with record turnaround times.
2. The Analog and FPGA engineering teams ported the existing modem code and also validated the IF frontend and clock sections for the required performance.
3. The DSP and FPGA engineering teams implemented the diversity combining, interleaving/de-interleaving and adaptive equalizers in a short span of time.
4. The SoC firmware engineering team worked on porting Linux to the new SoC FPGA and implemented a transparent Ethernet bridge between the actual Ethernet interface and the virtual wire interface representing the modem on the FPGA connected as a AXI Stream peripheral over DMA.
Thotakã demonstrated a fully functional device that satisfied the key diversity specification criteria within a span of just 48 calendar weeks.